The present invention generally relates to the management of thermal energy generated by electronic systems, and more particularly to a packaging scheme for efficiently and cost effectively routing and controlling the thermal energy generated by various components of an electronic system.
The electronics industry, following Moore""s Law, has seemed to be able to defy the laws of economics by providing ever increasing computing power at less cost. However, the industry has not been able to suspend the laws of physics inasmuch as high computing performance has been accompanied by increased heat generation. Board level heat dissipation has advanced to a point that several years ago was only seen at the system level. The trend toward ever increasing heat dissipation in microprocessor and amplifier based systems, such as are housed in telecommunication and server port cabinets, is becoming increasingly critical to the electronics industry. In the foreseeable future, finding effective thermal solutions will become a major constraint for the reduction of system cost and time-to-market, two governing factors between success and failure in commercial electronics sales.
The problems caused by the increasing heat dissipation are further compounded by the industry trend toward system miniaturizationxe2x80x94one of the main methodologies of the electronics industry to satisfy the increasing market demand for faster, smaller, lighter and cheaper electronic devices. The result of this miniaturization is increasing heat fluxes. For example, metal oxide semiconductor-controlled thyristors may generate heat fluxes from 100 to 200W/cm2, some high voltage power electronics for military applications may generate heat fluxes of 300W/cm2, while some laser diode applications require removal of 500W/cm2. Also, non-uniform heat flux distribution in electronics may result in peak heat fluxes in excess of five times the average heat flux over the entire semiconductor chip surface (xcx9c30W/cm2).
Thus, as clock speeds for integrated circuits increase, package temperatures will be required to correspondingly decrease to achieve lower junction temperatures. However, increasing package temperatures will result from the increase in heat dissipation in the package from higher clock speed devices. This increase in temperature will cascade throughout the interior of the structure that encloses or houses such circuits, (e.g. a typical telecommunications or server port cabinets, or the like) as the number of high power semiconductor components positioned within the housing increases. The difference between these physical aspects (i.e., the difference between the interior cabinet temperature and the package temperature) of the electronic system defines a xe2x80x9cthermal budgetxe2x80x9d that is available for the design of the cooling devices/systems needed to manage the heat fluxes generated by the various electronic devices in the system. As these two conflicting parameters converge, the available thermal budget shrinks. When the thermal budget approaches zero, refrigeration systems become necessary to provide the requisite cooling of the electronic system.
It is well known to those skilled in the art that thermal resistances (often referred to as xe2x80x9cdelta-Txe2x80x9d) for typical thermal systems at the semiconductor junction-to-package, package-to-sink and sink-to-air levels have been trending up over the past decade. The lack of understanding of micro-scale heat transfer physics, the requirement of matching the coefficients of thermal expansion (C.T.E.""S) of a semiconductor chip and the thermal energy spreading materials, and the potential adverse effect on conventional packaging practices of integrating heat transfer mechanisms into packages, have largely limited the choice of cooling/spreading techniques at the semiconductor chip and semiconductor package levels to heat conduction.
Extensive efforts in the areas of heat sink optimization (including the use of heat pipes) and interface materials development in the past have resulted in the significant reduction of sink-to-air and package-to-sink thermal resistances. However, the reduction of these two thermal resistances has now begun to approach the physical and thermodynamic limitations of the materials. On the other hand, the junction-to-package thermal resistance (delta-T) has increased recently, due to the increasing magnitude and non-uniformity (localization) of the heat generation and dissipation from the semiconductor package.
Successful cooling technologies must deal with thermal issues at the device, device cluster, printed wiring board, subassembly, and cabinet or rack levels, all of which are within the original equipment manufacturer""s (OEM""s) products. Many times, the problem is further complicated by the fact that the thermal solution is an xe2x80x9cafter thoughtxe2x80x9d for the OEM. A new equipment design may utilize the latest software or implement the fastest new semiconductor technology, but the thermal management architecture is generally relegated to the xe2x80x9clater phasesxe2x80x9d of the new product design. The thermal management issues associated with a designed electronic system are often solved by the expedient of a secondary cooling or refrigeration system that is arranged in tandem with the electronics system.
There are several negatives associated with the use of tandem cooling or refrigeration systems. The additional electrical power required by such systems not only increases the cost to operate the electronic equipment, but also causes an adverse environmental impact in the form of pollution (from power generation processes) and noise. Reliability issues are also of considerable concern with refrigeration systems. In addition, such add-on thermal management solutions can make after market servicing very difficult and expensive. There is a need for a thermal management system that can be easily disassembled from the underlying electronic system, in the field, to facilitate servicing of the components.
There is a compound challenge in the art to provide a thermal management architecture that satisfactorily accumulates and transfers variable amounts of thermal energy, generated by a wide variety of electronic components arranged together in an enclosed space, while avoiding or minimizing the use of non-passive, tandem cooling or refrigeration systems for cooling. As a consequence, there is also a need in the art for a cost effective, integral thermal management architecture for high power electronic systems and that is easily removed during servicing.
The present invention provides a thermal energy management system comprising a heat spreading device that is operatively engaged with at least one semiconductor chip. A thermal bus is operatively engaged with the heat spreading device so as to transport thermal energy from the heat spreading device to a heat sink. In one preferred embodiment, the heat spreading device comprises a heat pipe and a thermal bus is provided that comprises a loop thermosyphon. In another embodiment of the invention, a second thermal bus is operatively engaged with the first thermal bus so as to transport thermal energy from the first thermal bus to a heat sink. The second thermal bus may also comprise a loop thermosyphon.
A method of managing thermal energy in an electronic system is provided that includes spreading thermal energy generated by one or more devices over a surface that is relatively larger than the devices, thermally coupling an evaporator portion of a loop thermosyphon to the surface, and thermally coupling a condensing portion of the loop thermosyphon to a thermal energy sink, e.g., a second loop thermosyphon, convection fin, or cold plate.